Implementation of Modified Booth Algorithm for Power Critical Applications

Authors:GUNNAM JYOTHI, VUNDAVALLI RAVINDRA

1556-1560

Fault Tolerant of FIFO Buffers of NoC Router

Authors:G.PRASANTHI, T.SUNEEL KUMAR

1561-1567

Design of Power Efficient Multiplier using Area Delay Power Efficient Carry Select Adder

Authors:V. PRASANTH, HANITHA RAGHAVA D

1568-1571

FPGA Implementation of a Satellite Attitude Control using Variable Structure Control

Authors:V. PRASANTH, S. VIDHYA BALANTRAPU, RASAMSETTI KIRANMAI

1572-1574

Design and Simulation of Multirate Filter using BFD Multiplier Architecture

Authors:V. PRASANTH, ALEKHYA I

1575-1578

Low-Power Weighted Pseudo-Random BIST using Special TPG

Authors:B. SUDHIR, U. VIMALA DEVI

1579-1581

Automatic Control and Status of Vending Machine using Wireless Networks

Authors:SANA RAVI, Y. RAMESH

1582-1583

Retina Blood Vessel Segmentation and Exudates Detection using Morphological and Clustering with Neural Network

Authors:KADIYALA VENKATA LAKSHMI, M. SUNIL BABU

1584-1589

Hardware Implementation of FMO/Manchester Encoding using Sols Techniques on FPGA

Authors:K.PRASHANTH, D.SRIKANTH

1590-1594

Hardware Implementation of Reversible Logic Gate using 3 to 8 Decoder

Authors:D.HARSHAVARDHAN, R.CHENNAKESHAVULU

1595-1597